Hi all,
Tomorrow Ian Hesner will tell us about his master thesis at IBM entitled "Implementing and Benchmarking a Floquet Code on Superconducting Hardware". See below for the abstract. The talk will take place at 2 pm in HIT E 41.1
Best, Ladina
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Title:
Implementing and Benchmarking a Floquet Code on Superconducting Hardware
Abstract:
Floquet codes are a novel style of quantum error correcting code with dynamically- generated logical observables defined on a hexagonal lattice. The hexagonal layout makes it an excellent candidate to fit on the heavy-hex layout of IBM Quantum devices. In this work, we view the Floquet code through the anyonic model of topological quantum computing to define a planar implementation that fits on existing devices. Actually running the Floquet code on IBM’s ibm_sherbrooke Eagle device shows that current devices are still well above Floquet code thresholds. Further work investigated a benchmarking technique to more accurately compare simulation data to real device data. Typically, simulation results for running quantum error correcting codes compare quite poorly to results obtained from real devices. Average detector triggering likelihoods were explored to be used as an intermediate parameter to directly compare the two. With this as an intermediate parameter, an effective-p value could be derived for a real device, comparing the complex noise landscape of a real device to a flat noise model defined by a single parameter p. This effective-p value does a much better job of simulating real device performance over other standard Pauli noise model techniques. It was found that for the best locations that can fit a Floquet code on ibm_sherbrooke, it has an effective-p value of just over 2%.
itp-quantumseminare@lists.phys.ethz.ch